A blueprint for a quantum computer in reverse gear CommsPhys
. We propose to design a quantum factoring device by constructing a reversible version of a classical multiplication circuit built from basic, half-, and full-adder gates. This is accomplished by encoding each previously irreversible logic gate in the ground space of a spin Hamiltonian.
]. The proposed Hamiltonians are tied to unit cells that can be arranged in a modular manner and are, therefore, easily scalable.By introducing reversible gates, factorization is considered a reverse multiplication. The problem is reformulated as an optimization problem by encoding the logic in the ground space of a spin Hamiltonian.
. In this more general context, the work presented here explores what’s feasible within the parity framework, i.e., how the factoring problem can be tackled by building on parity ’plaquettes’ equipped with local fields.It is straightforward to build a Boolean circuit that takes as input the binary representations of two numbers
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